Various substrates are known for mounting and connecting to integrated circuit devices. When two or more such integrated circuit devices are mounted to such a substrate, the resulting assembly is typically termed a "multichip module". As used herein, the term "multichip module" applies to situations where one or more integrated circuit devices are mounted to a substrate.
A printed circuit board (PCB) is an example of such a substrate, and has at least one layer of conductive lines for connecting to at least one integrated circuit device. Additional components may be mounted to the PCB. Often, the interconnections between the various components mounted to the substrate necessitate a large number of conductive lines (traces) which need to cross one another. In such cases, it is known to provide a multilayer substrate, having alternating layers of insulating material (such as fiberglass, teflon, FR4, BT resin, and the like) and conductive trace patterns (typically formed of metal foils, such as copper). The conductive traces from one layer are typically connected to the conductive traces of another layer by plated through-holes. In this manner, complex interconnection schemes can readily be effected. However, plated through-holes are a constant source of concern, from a reliability viewpoint. Further, the densities achievable using PCBs as a substrate are somewhat limited by the effective geometry of the conductive lines that can be applied to the various layer of the substrate.
Higher densities of interconnect can be achieved with a new class of substrates, such as are disclosed in U.S. Pat. No. 4,963,512. Like PCBs, these high-density substrates employ alternating conductive and insulating layers. Typically, these high-density substrates are based on polyimide insulating layers, and the conductor patterns are formed by electroless plating of an underlying conductive pattern atop a polyimide layer. Connections between conductors, from layer-to-layer, are effected by vias--a type of through-hole which is subsequently filled with a conductive material, such as by sputtering or in the same step as the next higher conductor layer is applied. These vias are formed through an insulating (e.g., polyimide) layer, which typically are on the order of tens of microns (.mu.m) thick, and are consequently very difficult to fill reliably.
Another problem with multichip modules, whether PCB or polyimide film based, is that the integrated circuits mounted to the substrate are typically mounted "face-down". In other words, the circuit elements of the integrated circuit die are in close juxtaposition with the surface of the substrate. Hence, heat generated by these circuit elements, during operation of the die, is difficult to extract from the die. Various arrangements of mounting thermal masses to the back side (non-circuit-element side) of the die are known, but are clumsy and are of somewhat attenuated effectiveness. Simply stated, the substrate itself is in the way of any effective heat sinking element that can be placed in close juxtaposition to the front (circuit-element) side of the die. The difficulty of removing heat from dies operating in a multichip module causes difficulties in the reliability both of the die and of the substrate. Vis-a-vis the substrate, excess heat can cause delamination of the layers and/or failure of the layer-to-layer connections (through vias) of conductor lines.
Another issue in the formation of polyimide film type substrates is planarization of the various layers. This is similar, in type, to certain problems faced in the manufacture of semiconductor devices, albeit on an entirely different scale and requiring dissimilar processes for dissimilar materials than are applicable to and are found on dies. Briefly, as layer-upon-layer is formed on a substrate, topological irregularities (non-planarities) in one layer will manifest themselves, and in some cases augment themselves, in subsequent layers. This is antithetical to the goal of having a planar surface of the substrate for mounting an integrated circuit device. Techniques such as spinning-on polyimide to achieve a planar polyimide layer are known, and address this issue. An example of known techniques for forming a multilayer substrate for mounting integrated circuit devices is now described.
A first, conductive metal layer is deposited and patterned on the surface of an insulating layer, such as polyimide film. The patterned metal layer is coated with a thick dielectric layer, such as polyimide polymer, having a thickness on the order of 5-50 .mu.m (microns). The dielectric layer is masked, by suitable means, and patterned by wet chemical etching or dissolution processes or dry plasma etching processes, to form vias extending through the dielectric layer to the underlying patterned metal layer. These vias can have rather steep (e.g., ninety degree) walls, and a subsequent, second metal layer (film) applied (deposited) over the dielectric (insulating) layer will have great difficulty in filling the vias and achieving good sidewall coverage in the vias. This poor via filling will be evident even if the angle of the sidewalls is reduced (e.g., to thirty or forty degrees). Generally, the phenomenon of "self-shadowing" of the metal deposition by the walls of the via causes poor metal step coverage at the base of the via, where the metal of the second metal layer contacts the metal of the first metal layer.
Generally, in the current state of the art in the production of such substrates for multi-chip modules (as well as single chip modules), the spacing between metal layers can exceed 10 .mu.m. This creates substantial step coverage issues for the production of said modules and poor production yields as a result.
As mentioned hereinabove, certain issues (e.g., planarization) affecting substrates for multichip modules are similar in type to issues being addressed in the formation of the layers of a semiconductor die, but require solutions that are different in kind. For example, U.S. Pat. No. 4,708,770 discloses a planarized process for forming vias in silicon wafers.